GE Jobs

Mobile GE Logo

Job Information

General Electric Circuit Card Layout Engineer in Queretaro, Mexico

Job Description Summary

The circuit card layout engineer completes routing of multilayer Printed Circuit Board (PCB). This is following the circuit layout constraints and support placement of components defined by the Circuit Board LayOut Lead Engineer and/or the circuit card designer. Layout engineers are also responsible for generating layout fabrication data and drawings that are to be used for circuit board fabrication. In this role you will work within defined parameters to make decisions, apply concepts to issues of mid-low complexity, and resolve issues through immediate action or short-term planning.

Job Description


  • Knowledge in Electronic Computer Aided Design Software (ECAD) like Mentor Graphis, Cadence, Altium Designer etc.

  • Draw multilayer (8-24 layer) PCB.

  • Work closely with circuit design engineers to complete layout task withing defined cost and schedule.

  • Support generation of printed circuit board fabrication information guided by CIrcuid Card LayOut Lead engineer.

  • Support Engineering Change Requests (ECRs) on modification of existing circuit card fabrication information.

  • Application of IPC PCB Standards


  • Bachelor’s degree level in an electronic discipline, or equivalent experience.

  • Experience in engineering related activities focused in CAD for electronics.

  • Ability to break down mid-complex problems and apply critical thinking.

  • Professional technical writing and technical communication proficiency.

  • Knowledge of board level digital design including schematic capture, implementation, integration, and verification.

  • Ability to break down complex problems and apply critical thinking.

  • Strong professional technical writing proficiency and technical communication.

Desired Qualifications

  • Knowledge in High Density Interconnect (HDI) technologies (micro vias, buried / blind vias, back drilling) for IPC Class 3 board.

  • Knowledge in routing of 5+ Gbps serial links. (10GBASE-KR, PCIe Gen3, Fiber Optics)

  • Knowledge in board simulations including Power Integrity (PI) and Signal Integrity (SI).

  • Knowledge in routing Gigahertz microprocessors, FPGA, CPLD, DDR3 or DDR4 memory, flash memory, Gigabit Ethernet, and PCIe.

  • Knowledge in routing large pin count devices, 1000+ pins with 0.8mm device pitch or smaller.

  • Knowledge in routing with CAN & diverse communications protocols.

  • Familiarity with Microsoft Office, Microsoft Visio.

Additional Information

Relocation Assistance Provided: No